1. Field of Invention
This invention is in the field of IC Diagnostics. More specifically, this invention is about improving time for localization by implementing an in-situ decapsulation.
2. Related Art
Most of the electrical fault localization techniques, such as emission microscope (typically called EMMI), laser scanning microscope, OBIRCH, or TIVA, require surface material to be removed if the analysis is required on a packaged integrated circuit (IC). One exception is lock-in thermography which allows detection of hot spot at the surface of a packaged IC, indicating the x, y, z origin of the electrical defect location. However, also with lock-in thermography technique, sometimes a thick material near the surface of the package tend to make thermal signature to spread out and hence affect the ability to localize with a high spatial resolution.
A stand-alone system to perform laser decapsulation of semiconductor packages has been available and well known in the industry. There are commercial models available such as FALIT by Control Laser Corp., or JET ETCH PRO by Nisene Technology Group, Inc. These systems are capable of removing a large volume of package material but in a dedicated chamber as a single use system.
Laser marking capability also has been available as an integrated option for conventional electrical failure analysis or fault isolation systems. Such an option is used to leave a set of physical marks on a surface of a semiconductor package by etching a pattern of single dot laser marks on the surface. Hamamatsu Photonics offers such option on their PHEMOS-1000 electrical failure analysis system, so does DCG Systems, Inc. on its ELITE lock-in thermography system.
There are other techniques available for removing semiconductor packaging material, such as focused ion beam (FIB), plasma FIB, chemical etching or mechanical polishing. However, all these techniques require either a vacuum environment or tightly controlled environmental chamber for handling the materials being removed.